Functional Evaluation for Printed Circuit Board Based on Surface Mount Technology Process Data

Functional test strategy adjustment can save testing time and testing costs for companies. Since focusing on testing possible defective products can save a lot of testing time, a natural idea is to evaluate the functionality of the printed circuit boards (PCBs) based on surface mount technology (SMT) process data. Considering the important impact of electrical pathways on PCB functional evaluation, we propose a generative adversarial network method based on circuit layout (CL-GAN). Specifically, the generator is mainly composed of electrical node attribute feature extraction module and electrical connection feature extraction module. These modules are used to model the quality attributes of key nodes in PCB electrical pathways and model electrical connection relationships. The discriminator is trained to perform PCB functional evaluation. Experimental results demonstrate that CL-GAN achieves a 33.34% improvement in F1 score, along with a 96.64% reduction in testing time and a 64.77% decrease of total cost.