Fully Integrated Resistance Calibration Method Using Reference Frequency and MOSFET Capacitance

A solution for fully integrated on-chip resistance calibration method is proposed. The solution uses stable clock frequency as a reference instead of an on-board high precision resistor. This stable clock frequency is widely available in communication interfaces where impedance matching is crucial. The accuracy of the calibration is limited by the process variance of the integrated MOSFET capacitor which is much tighter than the variance of on-chip poly, metal, or transistor-based resistances. The capacitor is charged to VDD during the clock pulse via a switch and discharged through the digitally controlled resistance during the passive half-period of the clock. The voltage on the capacitor is monitored via a low offset comparator and when it reaches down to the reference level for the first time the digital controller stops the calibration process and stores the code. The proposed solution achieves ±5 accuracy after parasitic extraction and is well within the ±10% specification of high-speed communication interfaces.

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Published
2024-11-13
DOI
https://doi.org/10.1109/ewdts63723.2024.10873752
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

Fully Integrated Resistance Calibration Method Using Reference Frequency and MOSFET Capacitance

Vardan Sahakyan, Hrayr Sahakyan, O.H. Petrosyan, A.A. GALSTYAN et al.
Analog and Mixed-Signal Circuit Design
article

Fully Integrated Resistance Calibration Method Using Reference Frequency and MOSFET Capacitance

Vardan Sahakyan, Hrayr Sahakyan, O.H. Petrosyan, A.A. GALSTYAN, A. O. Melikyan, Razmik Soghomonyan, Gaenik Voskanvan
article en

Abstract

A solution for fully integrated on-chip resistance calibration method is proposed. The solution uses stable clock frequency as a reference instead of an on-board high precision resistor. This stable clock frequency is widely available in communication interfaces where impedance matching is crucial. The accuracy of the calibration is limited by the process variance of the integrated MOSFET capacitor which is much tighter than the variance of on-chip poly, metal, or transistor-based resistances. The capacitor is charged to VDD during the clock pulse via a switch and discharged through the digitally controlled resistance during the passive half-period of the clock. The voltage on the capacitor is monitored via a low offset comparator and when it reaches down to the reference level for the first time the digital controller stops the calibration process and stores the code. The proposed solution achieves ±5 accuracy after parasitic extraction and is well within the ±10% specification of high-speed communication interfaces.

National Polytechnic University of Armenia (AM), Yerevan State University (AM), Institute of Radiophysics and Electronics (AM), European University of Armenia, National Academy of Sciences of Armenia (AM)
Affordable and clean energy
Openalex Percentile: Top 75%
Analog and Mixed-Signal Circuit Design
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Fully Integrated Resistance Calibration Method Using Reference Frequency and MOSFET Capacitance — Vardan Sahakyan, Hrayr Sahakyan, et al. · (2024) | TGRS Research Map | TGRS