LBIST Configuration and Golden Signature Extraction of Black Box IP Cores

Due to the ever-growing use of IP cores in safetycritical applications such as the automotive industry and the varying use cases of every customer, testing these IP cores in alignment with functional safety constraints becomes crucial. Hardware Built-In Self-Test (BIST) methods are commonly employed in such designs, and to efficiently test them, a certain degree of configuration is necessary. We are proposing a method to protect IP cores by not revealing internal hardware to prevent counterfeiting and reverse engineering while enabling flexible examination of diverse test strategies. To prevent inefficient blind configuration of the test hardware, it is crucial to provide information about how configuration impacts test coverage. This work proposes utilizing C++ dynamic libraries to represent an IP core and configure the test hardware model for various testing purposes along with developing gate models that implement an estimation method for test coverage.