FPGA/ARM Design of Multibeam Adaptive Array for GNSS Receiver

A multibeam Adaptive Antenna Array (AAA) for the receivers of the Global Navigation Satellite Systems' (GNSS) signals is presented. The AAA channel signals are preprocessed by correlators. This increases the Signal-to-Noise Ratio (SNR) and allows to use the adaptive algorithms that employ the desired signals. The paper describes the details of the correlator implementation in a Field Programmable Gate Array (FPGA) as well as the implementation of the Matrix Inversion Lemma (MIL) Recursive Least Squares (RLS) algorithm for the AAA weights calculation that uses a core of the Advanced RISC Machine (ARM) processor which is a part of the Xilinx XCZU5EG System-on-Chip (SoC). The ARM processor computes the AAA weights using complex-valued double-precision arithmetic. One beam of the resulting 16 channel AAA occupies less than 1 % of all possible resources of the XCZU5EG FPGA which is a part of the SoC. One iteration of the adaptive algorithm (weights calculation) per beam takes about 0.015 ms. This allows to easily implement up to 16 beams of the considered AAA, which is a maximum possible number of the Global Positioning System (GPS) satellites visible at a certain point on the Earth surface at an arbitrary time moment. The designed adaptive algorithm also requires about 8 kB of external memory per AAA beam. The rest of the SoC resources and the external memory is used for other digital elements of the AAA/GNSS receiver, such as synchronization, data processing, etc., which are not considered in this paper.