VRV: A Versatile RISC-V Simulator for Education

This paper introduces VRV, a new and open-source RISC-V simulator designed for educational purposes. VRV aims to fill the gap left by the obsolescence of SPIM, the once-popular MIPS simulator, by providing a user-friendly, versatile tool for teaching computer organization and assembly language programming at undergraduate level. VRV offers both command-line and graphical interfaces, implements a large subset of the RISC-V instruction set, and includes features such as an integrated debugger and support for system-level programming. We discuss the design choices, implementation details, and initial classroom experiences with VRV, highlighting its potential to become a valuable resource in computer architecture education. The source code can be found at https://gitlab.com/luplab/vrv.