Molded SiP Manufacturing with Integrated Shielding Layer for Optimized EMI Robustness

The functional reliability of microelectronics packages in harsh environment use not only depends on interconnect integrity and thermomechanical robustness, also signal integrity can play an important role for package performance. For industrial/automotive use, the shielding of packages against electromagnetic interference is a key process tep that defines package performance in challenging environments. Within the project AdaPEdge, Fraunhofer IZM, TUB and MST are cooperating to manufacture highly integrated packages using Flip Chip technology and MAP molding technologies for package realization. To ensure optimized shielding of the packages, a test vehicle has been designed that allows the determination of shielding efficiency of molded packages without and with shielding layers created in different technological approaches. These technologies can be applied to single packages and to full MAP areas and include direct metallization on molding compounds, contactless dosing of a conductive layer and laser direct structuring. As a result, the paper presents the manufacturing of Shielding Efficiency test samples in various technologies, the SE measurements over a wide frequency range for samples with varied shielding layer thickness. The measurements are validated using an analytical model developed in-house and there is good agreement between the measurement and the analytical model. Based on the analytical model, physical effects at the interface of material and in the material are separated and analyzed. Comprised, packaging boundary conditions and design rules for define EMC-robust packages will be provided that allow an efficient manufacturing of functional SiP packages.