Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration

In this study, the fan-out chip-last panel-level packaging in fabricating an ultra-large organic interposer of a hybrid substrate for heterogeneous integration is investigated. Emphasis is placed on the design, materials, process, fabrication, and reliability of a hybrid substrate (85 mm x 80 mm) with an ultra-large organic interposer (5 RDLs with the minimum metal line width (L) and spacing (S) = 2 μm) and a 5-2-5 build-up package substrate. Also, some recommendations are provided.

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Publication Details

Journal
IMAPSource Proceedings
Published
2025-02-10
DOI
https://doi.org/10.4071/001c.129610
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.00
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article

Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration

John H. Lau, Henry Yang, Curry Lin, Tian Xia et al.
IMAPSource Proceedings
3D IC and TSV technologies
article

Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration

John H. Lau, Henry Yang, Curry Lin, Tian Xia, Minglin Ma, Bryant Lin, Tzyy-Jang Tseng, Christopher S. Chen, C. T. Ko
article en

Abstract

In this study, the fan-out chip-last panel-level packaging in fabricating an ultra-large organic interposer of a hybrid substrate for heterogeneous integration is investigated. Emphasis is placed on the design, materials, process, fabrication, and reliability of a hybrid substrate (85 mm x 80 mm) with an ultra-large organic interposer (5 RDLs with the minimum metal line width (L) and spacing (S) = 2 μm) and a 5-2-5 build-up package substrate. Also, some recommendations are provided.

IMAPSource ProceedingsVol. 2024(Symposium)
Micron Corporation (United States) (US)
Openalex Percentile: Top 98%
3D IC and TSV technologies
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