High Performance and Cost-Effective Wafer Bumping Approach with Solder Paste Printing for Small LED Die

The increasing trend of LEDs die size reduction driven by the demand for high-resolution displays and compact wearable devices, presents significant challenges for assembly packaging. Achieving sufficient paste volume and maintaining low void rate in the solder paste during the die mounting on the substrate process is crucial for high performance LED applications. This paper presents a novel approach to wafer bumping using solder paste printing process. It demonstrates the methods used to achieve good solder paste printing volume with low void rate via three reflow steps using different stencil designs. Sn/Cu alloy solder paste with T7 powder (2~11um) is used for the study. Solder paste bump height post-reflow process and the void rate in the solder paste were measured and analyzed with 3D AOI and X-ray, respectively. The study and methods used with Heraeus solder paste achieved good package reliability, function test passing 85°C/85% & 60°C/90% Wet High Temperature Operating Life (WHTOL) 1000 hours, and Powered Temperature Cycling (PTC) ON/OFF 1000 cycles, -40°C ~ 85°C Temperature Cycle Testing (TCT) 1000 cycles. The result from this study offers valuable insights and solutions for addressing the assembly challenges associated with small LED die sizes. It offers a good solution for achieving high-performance and cost-effective wafer bumping process for miniLED applications.