Characterization of Thermally-Enhanced Advanced Electronic Flip Chip CSP Packages

In recent years, high performance and low cost have been the prime motivation for the advanced package developments. The cost-effective flip chip chip-scale package (fcCSP), well stablished in the semiconductor industry, has been extensively utilized in industrial, space, and automotive applications as well as consumer electronics devices. Recently, fcCSP devices have been built using coreless embedded trace substrates (ETSs) that have the advantages of low cost and better electrical performance. However, the standard fcCSP-ETS package is overmolded and has limited capability to handle high performance devices. In this paper, we explore enhancing the thermal performance of advanced fcCSP packages on a two-metal layer coreless ETS, targeting industrial and automotive applications. To this end, three different 13x13 mm2 package configurations, namely overmolded (baseline), exposed die (lidless), and lidded packages are designed, fabricated, and characterized and their thermal performances are compared under different ambient temperatures. Thermal modeling simulations for all scenarios are carried out in a 3D commercial modeling software and validated against the experimental measurements. From the obtained results, thermal performance of various fcCSP package configurations are compared and the relevant design guidelines are drawn.