Development of Virtual Material Approach for Modeling Viscoelasticity of Underfill in Flip Chip Packages

This paper presents a virtual material approach to modeling the viscoelastic properties of underfill materials in flip chip packages. The role of underfill is critical, particularly in addressing the challenges associated with cracks in solder bumps in thermal cycles. To ensure the long-term reliability of the semiconductor packages, it is crucial to understand how different underfill properties interact with the package and influence the stress distribution. A fully cured underfill material exhibits viscoelastic behavior. But in many cases, viscoelasticity is neglected and underfill properties are simplified to linear elastic in the finite element analysis (FEA) to save computational cost. For high accuracy numerical predictions, it is indispensable to include a full characterization of viscoelastic properties for underfill in simulation. This work develops a virtual material approach to parameterize the viscoelasticity of underfill materials. A generalized logistic function is adopted for the parameterization of the frequency-dependent modulus in master curve. The master curve is then calibrated in Prony series for numerical implementation. A three-dimensional FEA model is built for evaluating underfill properties in flip chip packages. Fine details such as solder bumps are only included in the sub-modeling for computational efficiency. The FEA model is validated by warpage measurement on a test vehicle in reflow process. Finally, with the developed virtual material approach and the FEA model, various viscoelastic properties of underfill are compared, and the influence on package stress including fillet top stress, die corner stress, and solder bump creep strain is evaluated. The virtual material approach can be particularly useful when dynamic mechanical analysis (DMA) results are not available or in scenarios where obtaining certain properties is challenging. The findings of this study contribute to the development of guidelines for selecting optimal underfill materials, ultimately enhancing the reliability of electronic devices.

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Publication Details

Journal
IMAPSource Proceedings
Published
2025-02-13
DOI
https://doi.org/10.4071/001c.129748
Primary Topic
Electronic Packaging and Soldering Technologies
Type
article
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article

Development of Virtual Material Approach for Modeling Viscoelasticity of Underfill in Flip Chip Packages

Kail Shim, D. Tarí, Μ. Y. Tsai, Ning Liu et al.
IMAPSource Proceedings
Electronic Packaging and Soldering Technologies
article

Development of Virtual Material Approach for Modeling Viscoelasticity of Underfill in Flip Chip Packages

Kail Shim, D. Tarí, Μ. Y. Tsai, Ning Liu, Christian Nordhorn
article en

Abstract

This paper presents a virtual material approach to modeling the viscoelastic properties of underfill materials in flip chip packages. The role of underfill is critical, particularly in addressing the challenges associated with cracks in solder bumps in thermal cycles. To ensure the long-term reliability of the semiconductor packages, it is crucial to understand how different underfill properties interact with the package and influence the stress distribution. A fully cured underfill material exhibits viscoelastic behavior. But in many cases, viscoelasticity is neglected and underfill properties are simplified to linear elastic in the finite element analysis (FEA) to save computational cost. For high accuracy numerical predictions, it is indispensable to include a full characterization of viscoelastic properties for underfill in simulation. This work develops a virtual material approach to parameterize the viscoelasticity of underfill materials. A generalized logistic function is adopted for the parameterization of the frequency-dependent modulus in master curve. The master curve is then calibrated in Prony series for numerical implementation. A three-dimensional FEA model is built for evaluating underfill properties in flip chip packages. Fine details such as solder bumps are only included in the sub-modeling for computational efficiency. The FEA model is validated by warpage measurement on a test vehicle in reflow process. Finally, with the developed virtual material approach and the FEA model, various viscoelastic properties of underfill are compared, and the influence on package stress including fillet top stress, die corner stress, and solder bump creep strain is evaluated. The virtual material approach can be particularly useful when dynamic mechanical analysis (DMA) results are not available or in scenarios where obtaining certain properties is challenging. The findings of this study contribute to the development of guidelines for selecting optimal underfill materials, ultimately enhancing the reliability of electronic devices.

IMAPSource ProceedingsVol. 2024(Symposium)
Henkel (Germany) (DE)
Openalex Percentile: Top 98%
Electronic Packaging and Soldering Technologies
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