Multiphysics Reliability Simulation and Validation of a Flip-Chip Build-Up Film Crack via Piezoresistive Stress Sensor

Flip-chip (FC) packaging technology in semiconductors has revolutionized the industry with high-performance and cost-effective solutions. However, aggressive miniaturization and integration are making mechanical reliability challenges more prevalent. Build-up passivation film crack due to interfacial delamination is becoming a growing reliability challenge. In this work, an innovative coupled multiphysics (thermomechanical) predictive modeling methodology is developed to quantify the localized structural stress magnitude and distribution under realistic thermal cycling. The predictive method employs finite element analysis (FEA) and digital image correlation (DIC) techniques to model the local thermal strain due to different coefficients of thermal expansion (CTE) at the metal and dielectric interface. The homogenization model adopting an image processing technique based on the light intensity analysis (LIA) was also developed to reflect the regional copper trace in the substrate with a broader range. The novelty of the current approach is the inclusion of DIC to accurately capture the localized strain in the region of interest under realistic thermal transient switching conditions. The dynamic mechanical analysis (DMA) technique characterized the rate-dependent mechanical properties. For the correlation phase to find critical parameters, 42 (6x7 array) piezoresistive stress sensors were implemented on the test chips design to ensure accurate and repeatable direct measurement of the stress distribution. This piezoresistive stress sensor was calibrated by a 4-point bending test that resulted in constant uniaxial stress at a fixed load, which was conducted by applying mechanical bending and controlling the stress sweep from compressive to tensile. Critical findings for achieving good correlations of stress distribution and magnitude between the multiphysics simulation flow results and measured data are utilizing rate-dependent properties and reflecting manufacturing process parameters. Generally, the FEA-based thermo-mechanical model under the reliability test loading is performed to evaluate the reliability performance and find the root causes. However, a multiphysics simulation approach and flow reflect that the temperature gradients have the potential to induce more significant stress concentrations based on the thermal simulation, which cannot be captured by using the typical conventional methodology. This methodology can be utilized to mitigate unexpected failure risks for future devices at the design stage. The predictive method developed here can be employed to predict thermomechanical reliability early in the semiconductor device design process.

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Journal
IMAPSource Proceedings
Published
2025-02-07
DOI
https://doi.org/10.4071/001c.129518
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
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article
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article

Multiphysics Reliability Simulation and Validation of a Flip-Chip Build-Up Film Crack via Piezoresistive Stress Sensor

Jaimal Williamson, Yutaka Suzuki, Rajen Murugan, Tobias Fritz et al.
IMAPSource Proceedings
Integrated Circuits and Semiconductor Failure Analysis
article

Multiphysics Reliability Simulation and Validation of a Flip-Chip Build-Up Film Crack via Piezoresistive Stress Sensor

Jaimal Williamson, Yutaka Suzuki, Rajen Murugan, Tobias Fritz, B. V. Travis, Cynthia Chapa
article en

Abstract

Flip-chip (FC) packaging technology in semiconductors has revolutionized the industry with high-performance and cost-effective solutions. However, aggressive miniaturization and integration are making mechanical reliability challenges more prevalent. Build-up passivation film crack due to interfacial delamination is becoming a growing reliability challenge. In this work, an innovative coupled multiphysics (thermomechanical) predictive modeling methodology is developed to quantify the localized structural stress magnitude and distribution under realistic thermal cycling. The predictive method employs finite element analysis (FEA) and digital image correlation (DIC) techniques to model the local thermal strain due to different coefficients of thermal expansion (CTE) at the metal and dielectric interface. The homogenization model adopting an image processing technique based on the light intensity analysis (LIA) was also developed to reflect the regional copper trace in the substrate with a broader range. The novelty of the current approach is the inclusion of DIC to accurately capture the localized strain in the region of interest under realistic thermal transient switching conditions. The dynamic mechanical analysis (DMA) technique characterized the rate-dependent mechanical properties. For the correlation phase to find critical parameters, 42 (6x7 array) piezoresistive stress sensors were implemented on the test chips design to ensure accurate and repeatable direct measurement of the stress distribution. This piezoresistive stress sensor was calibrated by a 4-point bending test that resulted in constant uniaxial stress at a fixed load, which was conducted by applying mechanical bending and controlling the stress sweep from compressive to tensile. Critical findings for achieving good correlations of stress distribution and magnitude between the multiphysics simulation flow results and measured data are utilizing rate-dependent properties and reflecting manufacturing process parameters. Generally, the FEA-based thermo-mechanical model under the reliability test loading is performed to evaluate the reliability performance and find the root causes. However, a multiphysics simulation approach and flow reflect that the temperature gradients have the potential to induce more significant stress concentrations based on the thermal simulation, which cannot be captured by using the typical conventional methodology. This methodology can be utilized to mitigate unexpected failure risks for future devices at the design stage. The predictive method developed here can be employed to predict thermomechanical reliability early in the semiconductor device design process.

IMAPSource ProceedingsVol. 2024(Symposium)
Texas Instruments (United States) (US)
Openalex Percentile: Top 98%
Integrated Circuits and Semiconductor Failure Analysis
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