Efficient Booting Process of Shakti C-Class Core Using UDMA SPIM in QSPI Mode
This work provides an extensive analysis of the booting sequence in RISC-V Shakti C-Class System on Chips (SoCs) prototype process. An important open-source project from IIT Madras, the Shakti project, provides a flexible and scalable family of RISC-V processor cores, with the C-Class designed primarily for mid-range applications. A variety of embedded applications are intended for the open-source Shakti C-class core. In these situations, making sure the boot process is efficient is essential, especially for applications that require fast startup times. The booting process described in this paper makes use of UDMA SPIM set up in QSPI mode, which offers a fast interface between the system's RAM and Flash memory. The suggested approach speeds up the bare-metal application's loading and execution considerably, improving system performance overall.
Authors
- V R Adersh
- S Sneha
- Gavini Sreelatha (ORCID: https://orcid.org/0000-0002-8146-0695)
- G. Nath
Publication Details
- Published
- 2024-12-06
- DOI
- https://doi.org/10.1109/isense63713.2024.10872359
- Primary Topic
- Computer Science and Engineering
- Type
- article
- Field-Weighted Citation Impact
- 0.00