Implementation of Image Enhancement Techniques on FPGA

Image enhancement techniques are used to enhance the visual quality of an image by varying its contrast, sharpness and color attributes. The main objective of image enhancement is to process an image such that the end result is more suitable than the original image for specific purposes. This paper focuses on the application of image-enhancing methods using Basys-3 FPGA board. Image filtering techniques such as Gaussian blur, edge detection and embossing filter are implemented in this project. The tool used for the implementation of this project is Xilinx Vivado for synthesis. The input image of size 160 x 115. The final output is obtained in monitor using a VGA cable. The code for the project is written in Verilog programming language. Overall, the project aims to demonstrate the feasibility and advantages of implementing Using image enhancement filters for image processing on FPGA platforms. In addition, power consumption, timing performance analyses and resource utilization reports are obtained to determine the design's efficiency. The results demonstrate that FPGA-based image enhancement is a reliable solution for real-time applications.

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Publication Details

Published
2024-12-06
DOI
https://doi.org/10.1109/isense63713.2024.10871951
Primary Topic
Industrial Vision Systems and Defect Detection
Type
article
Field-Weighted Citation Impact
0.00

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article

Implementation of Image Enhancement Techniques on FPGA

M S Anakha, Devu Sanal, S Sethukrishnan
Industrial Vision Systems and Defect Detection
article

Implementation of Image Enhancement Techniques on FPGA

M S Anakha, Devu Sanal, S Sethukrishnan
article en

Abstract

Image enhancement techniques are used to enhance the visual quality of an image by varying its contrast, sharpness and color attributes. The main objective of image enhancement is to process an image such that the end result is more suitable than the original image for specific purposes. This paper focuses on the application of image-enhancing methods using Basys-3 FPGA board. Image filtering techniques such as Gaussian blur, edge detection and embossing filter are implemented in this project. The tool used for the implementation of this project is Xilinx Vivado for synthesis. The input image of size 160 x 115. The final output is obtained in monitor using a VGA cable. The code for the project is written in Verilog programming language. Overall, the project aims to demonstrate the feasibility and advantages of implementing Using image enhancement filters for image processing on FPGA platforms. In addition, power consumption, timing performance analyses and resource utilization reports are obtained to determine the design's efficiency. The results demonstrate that FPGA-based image enhancement is a reliable solution for real-time applications.

University of Kerala (IN)
Ministry of Electronics and Information technology
Industry, innovation and infrastructure
Openalex Percentile: Top 60%
Industrial Vision Systems and Defect Detection
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