High Speed Variable Precision Approximate BFloat16 Multiplier for MAC Unit

The growing need for high-performance, energy-efficient computing devices has led to the continued development of approximate computing techniques. A high-speed variable precision approximate BFloat16 multiplier is proposed for fast computations in deep learning applications. Posit encoding is employed to control the bit-width of the mantissa multiplier, which will introduce approximation and variable precision. Here, the accuracy of the computation is regulated by the exponent value of the product. The proposed design achieves high-speed operation through the utilization of Wallace tree addition, employing exact 4:2 compressors in the mantissa multiplier. This decreases the number of stages required to add the partial product rows. The proposed multiplier achieves an 8.8% reduction in delay, an 11.82% reduction in area, and a 9.3% reduction in power consumption when compared with the conventional approximate BFloat16 multiplier. A MAC unit is implemented to validate the performance of the proposed multiplier.