Nanoscale NMOS Device Model Analysis and its Characteristics
Abstract A 90 nm NMOS MOSFET model is simulated using Silvaco Visual T‐CAD simulator. The materials used to simulate NMOS MOSFET are Al, Si, NpolySi, and SiO2. To overcome the problem of short circuits, lightly‐doped drain (LDD) implantation is applied in NMOS model. The analysis of the model is determined with T‐CAD simulator and obtained threshold voltage ( V th ) 2.568 V, while keeping oxide thickness ( T ox ) 2.373 nm and gate length 0.09 µm. The obtained result is compared with standard ITRS road map and gets almost similar results.
Authors
- Muhd Zu Azhan Yahya (ORCID: https://orcid.org/0000-0003-1129-0552)
- Nor Mas Mira Abd Rahman (ORCID: https://orcid.org/0000-0002-2127-4831)
- Palvinder Singh (ORCID: https://orcid.org/0000-0001-9670-2768)
- Amit Sachdeva (ORCID: https://orcid.org/0000-0003-2323-0397)
- Rishi Pal (ORCID: https://orcid.org/0009-0002-7279-6936)
- Shruti Singh
Institutions
- Chandigarh University (IN)
- Lovely Professional University (IN)
- Jawaharlal Nehru University (IN)
- University of Malaya (MY)
- National Defence University of Malaysia (MY)
- Sharda University (IN)
Publication Details
- Journal
- Macromolecular Symposia
- Published
- 2025-02-01
- DOI
- https://doi.org/10.1002/masy.202400191
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00