Realization of a New CMOS Transconductance Boosted Voltage Differencing Inverting Buffered Amplifier (TB-VDIBA) using Series Parallel Current Mirror (SPCM)

This paper introduces a novel transconductance ([Formula: see text]) boosted CMOS voltage differencing inverting buffered amplifier (TB-VDIBA). The proposed TB-VDIBA is an improvement over the conventional VDIBA. The proposed structure provides significantly higher transconductance while maintaining power dissipation within the same range as the existing VDIBA. The proposed TB-VDIBA maintains a constant biasing current (IB). It enhances the transconductance by connecting multiple MOSFETs in a series-parallel (SP) combination in the load current mirrors of the differential pair to boost transconductance. The enhanced performance of the proposed VDIBA is validated using SPICE simulation software and 180[Formula: see text]nm technology parameters. The validation process confirmed that the proposed VDIBA could achieve an enhanced transconductance of up to 1.1[Formula: see text]mS with a 3[Formula: see text]dB bandwidth of 381[Formula: see text]MHz at a biasing current of 50[Formula: see text] [Formula: see text]A, which is an increment of 3 times in [Formula: see text] keeping BW a little lower than conventional VDIBA. The proposed structure exhibits improvements in DC gain, linearity, and power efficiency over the conventional structure. The THD of the proposed structure is observed to be 0.34%. The proposed VDIBA exhibits a high-slew rate of 98[Formula: see text]V/[Formula: see text]s. The postlayout results are in close approximation to the prelayout simulation results. A universal MISO filter is also designed to check the performance of the proposed TB-VDIBA.