Simulation and analysis of 1024 point FFT using Axi-protocol and Xilinx IP core

This paper focuses on the implementation of a 1024-point FFT. A 1024-point FFT is significant in various applications, including signal processing, image processing, and communications, where it is essential to handle large data sets efficiently. The primary objective of this paper is to design and implement a 1024-point Fast Fourier Transform (FFT) algorithm using Verilog. This implementation aims to efficiently compute the discrete Fourier transform of a signal in a hardware environment. To design and implement the Fast Fourier Transform in Verilog module using Xilinx Vivado and to Verify the Fast Fourier Transform through MATLAB. Designing of basic 4-point and 8-point FFT in Xilinx Vivado using Verilog HDL Code and verifying the model through MATLAB by comparing. Design of 1024-point FFT in Xilinx Vivado using Verilog HDL program and verify the model through MATLAB.FPGA Synthesis of the design is carried out using Zynq-Zedboard (XC7Z020)