Analysis of Electrical Parameters for the Spacerbased Double Gate Junctionless Tunnel Field Effect Transistor
The advantageousness of spacer dielectric on both sides of gate oxide on the device performance of a “Double-gate junctionless TFET (DGJLTFET)” is discussed. The on-current is the primary parameter that has been explored. A high-k spacer significantly reduces “OFF-state leakage current by several orders of magnitude”, increasing the device's scalability. The DC and Analog/RF performance parameters of the device analyzed in this work are the “Drain Current” (IDS), ON-state to OFF-state current ratio (ION/IOFF), DIBL, Vth, Intrinsic gain, Output conductance (gds), transconductance/drain current ratio (gm/IDS), Cut-off frequency (fT), and TFP. The impact of increasing the spacer's dielectric constant (kspacer) on the device's electrical properties are investigated. However, increasing the spacer's dielectric constant has a negligible effect on the ONstate current.
Authors
- Jitendra Kumar Das (ORCID: https://orcid.org/0000-0003-4249-577X)
- Sadhana Subhadarshini Mohanty
- Pradipta Dutta (ORCID: https://orcid.org/0000-0002-2518-2184)
Institutions
- KIIT University (IN)
Publication Details
- Published
- 2024-11-29
- DOI
- https://doi.org/10.1109/aespc63931.2024.10872238
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00