Design of Low Power Two Bit Variable - Threshold Comparator by CMOS Technology
In the realm of Very-Large-Scale Integration (VLSI) design, power efficiency is a critical concern. As electronic devices become more ubiquitous and portable, minimizing power consumption becomes paramount. Variable-threshold CMOS (VTCMOS) is a circuit that reduces subthreshold leakage currents in the standby mode. The threshold voltages of NMOS and PMOS transistors are increased by adjusting the substrate bias voltage. This is also known as variable threshold MOS operation(VTMOS). VTMOS operation can result in power saving of up to 50% compared to CMOS operation and can be used in cascadable circuits like CMOS circuits. VTCMOS, a sophisticated technique, addresses this challenge by selectively adjusting the supply voltage of different blocks within a chip. In this essay, we explore the intricacies of VTCMOS, its benefits, trade-offs, and real-world applications. VTCMOS is a powerful technique used in Very-Large-Scale Integration (VLSI) design to minimize power consumption. It selectively adjusts the supply voltage of different blocks within a chip during active and standby modes. VTCMOS involves using transistors with different threshold voltages (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>) in the same circuit. High- V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> transistors are used for critical paths, while low- V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> transistors are used for non-critical paths. During standby or idle periods, non-critical blocks are selectively turned off by lowering their supply voltage, reducing leakage power. Variable-Threshold CMOS (VTCMOS) is a powerful technique used in VLSI design to reduce power consumption.
Authors
- Srinibasa Padhy (ORCID: https://orcid.org/0000-0003-2267-3743)
- Rajendra Prasad (ORCID: https://orcid.org/0000-0001-9851-8630)
- B. P. Padhy (ORCID: https://orcid.org/0000-0002-2279-007X)
- Amit Bakshi (ORCID: https://orcid.org/0000-0001-8147-9970)
- Rudra Narayan Dash
- Abinasha Prusty
Institutions
- KIIT University (IN)
Publication Details
- Published
- 2024-11-29
- DOI
- https://doi.org/10.1109/aespc63931.2024.10871959
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00