Decoupling Capacitor Booster Module

Intel CPU (Central Processing Unit) compute performance is influenced by the Load Line (LL) number, which is determined by the number of capacitors placed on the motherboard (MB). Adding more capacitors to achieve a better LL for higher core performance requires extra board area, potentially compromising battery size and impacting battery life. Additionally, maintaining platform compatibility for reuse over multiple generations can be challenging. Compatibility is disrupted when additional capacitors are needed for performance improvements in future products, necessitating a motherboard redesign, which affects the schedule and incurs additional costs. Redesigning a MB can vary significantly based on complexity and resources, which may take up to at least one quarter of a year. Accelerated development will also need a minimum of 8 weeks. The cost of the client motherboard also varies significantly based on the model and features, which can range from a few hundred dollars to more than a thousand dollars. The idea here is to have a Decoupling Capacitor Booster Module (DCBM) which is used to attach to the main MB to boost power delivery with those extra capacitors on the module. The capacitors on the DCBM need to be placed directly aligned vertically with the corresponding capacitors on the MB to get the best effectiveness by having the shortest loop inductance path to the package BGA. The DCBM takes advantage of the available Z-height and can be placed on the top or bottom side of the MB, or on both sides. Positioning capacitors on top of the DCBM is expected to be as effective as placing them on the main MB.

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Publication Details

Published
2024-10-16
DOI
https://doi.org/10.1109/iemt61324.2024.10875127
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
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article

Decoupling Capacitor Booster Module

Nik Mohd Syaeran Roslan, K.M.K.H. Leong
Low-power high-performance VLSI design
article

Decoupling Capacitor Booster Module

Nik Mohd Syaeran Roslan, K.M.K.H. Leong
article en

Abstract

Intel CPU (Central Processing Unit) compute performance is influenced by the Load Line (LL) number, which is determined by the number of capacitors placed on the motherboard (MB). Adding more capacitors to achieve a better LL for higher core performance requires extra board area, potentially compromising battery size and impacting battery life. Additionally, maintaining platform compatibility for reuse over multiple generations can be challenging. Compatibility is disrupted when additional capacitors are needed for performance improvements in future products, necessitating a motherboard redesign, which affects the schedule and incurs additional costs. Redesigning a MB can vary significantly based on complexity and resources, which may take up to at least one quarter of a year. Accelerated development will also need a minimum of 8 weeks. The cost of the client motherboard also varies significantly based on the model and features, which can range from a few hundred dollars to more than a thousand dollars. The idea here is to have a Decoupling Capacitor Booster Module (DCBM) which is used to attach to the main MB to boost power delivery with those extra capacitors on the module. The capacitors on the DCBM need to be placed directly aligned vertically with the corresponding capacitors on the MB to get the best effectiveness by having the shortest loop inductance path to the package BGA. The DCBM takes advantage of the available Z-height and can be placed on the top or bottom side of the MB, or on both sides. Positioning capacitors on top of the DCBM is expected to be as effective as placing them on the main MB.

Intel (Malaysia) (MY)
Openalex Percentile: Top 75%
Low-power high-performance VLSI design
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