Functional Validation on Complex Power Integrity Network Design

With the recent introduction of disaggregated die architecture, power delivery network (PDN) performance expectations have shifted, from previously self-induced noise to concurrent workload noise. In pre-silicon simulation environment, it is rather challenging to accurately predict such workload conditions. In this paper, a new testing methodology is added to test disaggregated PDN architecture. Knowing that multiple High-Speed Input Output (HSIO) ports like PCIe4 and USB4 when stressed with concurrent traffic will have an impact on receiver (Rx) jitter. Instead of the traditional electrical validation approach, the team used a functional validation test bench, and validated using real world traffic scenarios; to stimulate power management of multiple different HSIOs concurrency for several weeks, while also resulting in a surprisingly small receiver margin degradation. The paper will conclude PDN improvement and validation coverage recommendations for future disaggregated architecture, knowing this is becoming the new computing trend.