Computational Fluid Dynamics Approach to Enhance Capillary Underfill Encapsulant Process in Heterogenous Package

Currently, flip-chip packaging technology, which connects semiconductor chips to substrates using solder bumps, is evolving alongside heterogeneous integration to achieve higher performance and efficiency. This paper examines the dynamics of capillary underfill flow in a configuration featuring three chips without solder bumps. The setup uses a substrate and consists of two chips of equal size and a third, larger chip, with chip thickness and spacing between the chips (Chip to Chip (1) and Chip to Chip (2)) at 22.29, 5.71, and 5.71, respectively. The research employs a thorough framework that considers the geometry, materials, and boundary conditions. The simulations model the behavior of incompressible and non-Newtonian fluids, enhancing computational efficiency by excluding the impact of temperature. Experimental validation confirms a strong correlation with the simulated underfill flow across various normalized time intervals. The study delves into the influence of underfill dispense weight and the length of the dispense, underscoring their relationship with the flow's progression and the time taken to reach the third chip. This investigation sheds light on how variations in these parameters affect the underfill flow in densely packed chip assemblies, thereby improving our understanding and informing the design of the underfill process for complex chip layouts.