Exploring the Correlation Between Post-Die Bond Epoxy Void and Bond Line Thickness and other Factors on Power Packaging with Silver Sintered Epoxy

As 5th Generation (5G) deployments continue to expand globally, network operators need to extend their coverage while maintaining performance. The extension of 5G coverage requires wide-bandgap semiconductors such as GaN, GaAs, and SiC chip technology on power products such as PDFN(Power Dual No-lead). The packaging requirement also increases in term of high thermal dissipation ability under high temperature power devices conditions. Selection of die attach material with higher thermal conductivity and establish its process control is crucial in development of PDFN package for 5G application. This study diverges from conventional conductive epoxies, opting for Agsintered epoxy with a leadframe characterized by higher thermal and electrical conductivity. The research examines die bonding characteristics, aiming to identify crucial factors contributing to minimizing Ag sintered epoxy voids which could potentially compromise device performance especially in scenarios involving multiple die configurations and Ag-plated leadframe finish. The study focuses on characterization of bond line thickness (BLT) of Ag-sintered epoxy with different material properties through series of Design of Experiment (DOE) and establish correlation between epoxy void and BLT. The study also include other factors that influence the epoxy void such as die back metal type, height bonding, and force bonding concepts. The investigation provides essential insights into improving the die attach process by reducing epoxy voids across diverse conditions, offering invaluable guidance for semiconductor packaging processes. The findings, highly relevant in the ever-changing landscape of 5G technologies, tackle challenges related to coverage expansion and device performance optimization.

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Publication Details

Published
2024-10-16
DOI
https://doi.org/10.1109/iemt61324.2024.10875307
Primary Topic
Electronic Packaging and Soldering Technologies
Type
article
Field-Weighted Citation Impact
0.00

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article

Exploring the Correlation Between Post-Die Bond Epoxy Void and Bond Line Thickness and other Factors on Power Packaging with Silver Sintered Epoxy

SunKyong Kim, Eu Poh Leng, Jae Yun Kim, Shijun Kang et al.
Electronic Packaging and Soldering Technologies
article

Exploring the Correlation Between Post-Die Bond Epoxy Void and Bond Line Thickness and other Factors on Power Packaging with Silver Sintered Epoxy

SunKyong Kim, Eu Poh Leng, Jae Yun Kim, Shijun Kang, Azham Mohd Sukemi
article en

Abstract

As 5th Generation (5G) deployments continue to expand globally, network operators need to extend their coverage while maintaining performance. The extension of 5G coverage requires wide-bandgap semiconductors such as GaN, GaAs, and SiC chip technology on power products such as PDFN(Power Dual No-lead). The packaging requirement also increases in term of high thermal dissipation ability under high temperature power devices conditions. Selection of die attach material with higher thermal conductivity and establish its process control is crucial in development of PDFN package for 5G application. This study diverges from conventional conductive epoxies, opting for Agsintered epoxy with a leadframe characterized by higher thermal and electrical conductivity. The research examines die bonding characteristics, aiming to identify crucial factors contributing to minimizing Ag sintered epoxy voids which could potentially compromise device performance especially in scenarios involving multiple die configurations and Ag-plated leadframe finish. The study focuses on characterization of bond line thickness (BLT) of Ag-sintered epoxy with different material properties through series of Design of Experiment (DOE) and establish correlation between epoxy void and BLT. The study also include other factors that influence the epoxy void such as die back metal type, height bonding, and force bonding concepts. The investigation provides essential insights into improving the die attach process by reducing epoxy voids across diverse conditions, offering invaluable guidance for semiconductor packaging processes. The findings, highly relevant in the ever-changing landscape of 5G technologies, tackle challenges related to coverage expansion and device performance optimization.

NXP Semiconductors
Openalex Percentile: Top 75%
Electronic Packaging and Soldering Technologies
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