Manufacturability of A Novel Vertical Interconnect Design for High-Speed Signaling

A novel and patent-pending vertical interconnect that allows design customization from manufacturing perspective while meeting the impedance target of high-speed input/output interfaces (HSIOs) is the core of this paper. Plated- Through-Holes (PTHs) of Type-3 printed circuit board (PCB) are generally designed with physical dimensions that are dictated by manufacturing process. They are not designed with electrical performance as a consideration factor. As such, PTH impedance which can be as low as 70Ω for HSIO buses would have huge mismatch with transmission lines which are designed with ideal 85Ω for example. This translates to significant signaling performance impact. The vertical interconnect structure described in this paper is therefore innovated to meet the electrical requirement. This research is an extension of previously published technical papers that address and neutralize the electrical impairments caused by PTHs in Type-3 PCB. Specifically, this paper is focused on demonstrating the correlation between simulation and measurement results via test coupons of the said innovation, as well as definition of design rules that uses existing standard manufacturing process without incurring significant cost-adder.