Challenges and Resolutions of 28nm Copper Wire Bond Process for Automotive Application

The 28nm low-K wafer with copper (Cu) wire bonding remains popular in IC packaging due to its cost-effectiveness and flexibility. This study aims to address the challenges in Cu wire bonding process development for 28nm wafer technology to meet the stringent requirements of the Automotive Electronics Council (AEC). The Dual Row Quad Flat No-lead (DRQFN) package was chosen as the test vehicle for its high I/O count, compact size, and superior thermal performance. The 28nm technology features a fine-pitch device with a 48.6μm bond pad opening (BPO), a 56μm bond pad pitch (BPP), and a 2.8μm thick aluminum (Al) bond pad. This study details solutions for achieving high intermetallic compound (IMC) coverage, consistent Al remnants under Cu ball bonds, and minimizing crevice formation through wire bonding optimization. A comprehensive Design of Experiments (DOE) was conducted to identify the optimal process window ensuring robustness in high-volume manufacturing. Additionally, a new inspection method using Backscattered SEM (BSSEM) on the Cu-Al IMC provided reliable reference data crucial for recipe optimization. The optimized wire bonding concept was validated through rigorous reliability assessments and proven to meet AEC requirements, as well as demonstrated a high assembly yield of over 99.5% in small volume monitoring.