Implementation of 8-Bit SPI Protocol Using System Verilog and UVM

Currently, the design and verification of efficient communication protocols are essential in embedded systems. This paper focuses on the development and verification of an 8-bit Serial Peripheral Interface (SPI) protocol using System Verilog and Universal Verification Methodology (UVM). SPI, a popular protocol in embedded communication, enables high-speed, synchronous, full-duplex data transfer between a master and one or more slave devices. By utilizing SystemVerilog for hardware modeling and UVM for a modular, reusable testbench framework, this approach enhances the verification process's efficiency and accuracy. Various operational scenarios for the SPI protocol are tested, ensuring robust performance in communication systems.

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Publication Details

Published
2024-12-12
DOI
https://doi.org/10.1109/icuis64676.2024.10867233
Citations
4
Primary Topic
Embedded Systems and FPGA Design
Type
article
Field-Weighted Citation Impact
1.31
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Implementation of 8-Bit SPI Protocol Using System Verilog and UVM

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article

Implementation of 8-Bit SPI Protocol Using System Verilog and UVM

G Madhu Varshini, K. Tamilarasi, S. Sivaranjani, R Sandhiya, M. Saravanan, M. Tamilarasan
article en
4 citations

Abstract

Currently, the design and verification of efficient communication protocols are essential in embedded systems. This paper focuses on the development and verification of an 8-bit Serial Peripheral Interface (SPI) protocol using System Verilog and Universal Verification Methodology (UVM). SPI, a popular protocol in embedded communication, enables high-speed, synchronous, full-duplex data transfer between a master and one or more slave devices. By utilizing SystemVerilog for hardware modeling and UVM for a modular, reusable testbench framework, this approach enhances the verification process's efficiency and accuracy. Various operational scenarios for the SPI protocol are tested, ensuring robust performance in communication systems.

Sri Eshwar College of Engineering
Openalex Percentile: Top 18%
Embedded Systems and FPGA Design
1.31
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