Implementation of High-K Gate Dielectric in Cylindrical SOI Schottky Barrier MOSFET for Enhanced I<sub>ON</sub>/I<sub>OFF</sub> Ratio

In this work, we propose novel device architecture titled gate stack Cylindrical SOI Schottky barrier MOSFET transistor (GS-SOI-SB-CGAA). The analog/RF characteristics of the proposed structure are extensively investigated using Silvaco, which is a well-known simulator used for three-dimensional devices. This proposed MOSFET is being compared with schottky-barrier gate all around MOSFET (SB-CGAA) and silicon-on-insulator Schottky-barrier gate all around MOSFET (SOI-SB-CGAA) to investigate the analog/RF characteristics. The GS-SOI-SB-CGAA MOSFET demonstrates improved analog/RF characteristics for off-state drain current, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio, and device capacitance.

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Publication Details

Published
2024-11-30
DOI
https://doi.org/10.1109/edkcon62339.2024.10870826
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
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article

Implementation of High-K Gate Dielectric in Cylindrical SOI Schottky Barrier MOSFET for Enhanced ION/IOFF Ratio

Rashmi Gupta, Vandana Nath, Amit Saxena, Nitish Uppal
Integrated Circuits and Semiconductor Failure Analysis
article

Implementation of High-K Gate Dielectric in Cylindrical SOI Schottky Barrier MOSFET for Enhanced ION/IOFF Ratio

Rashmi Gupta, Vandana Nath, Amit Saxena, Nitish Uppal
article en

Abstract

In this work, we propose novel device architecture titled gate stack Cylindrical SOI Schottky barrier MOSFET transistor (GS-SOI-SB-CGAA). The analog/RF characteristics of the proposed structure are extensively investigated using Silvaco, which is a well-known simulator used for three-dimensional devices. This proposed MOSFET is being compared with schottky-barrier gate all around MOSFET (SB-CGAA) and silicon-on-insulator Schottky-barrier gate all around MOSFET (SOI-SB-CGAA) to investigate the analog/RF characteristics. The GS-SOI-SB-CGAA MOSFET demonstrates improved analog/RF characteristics for off-state drain current, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio, and device capacitance.

Guru Gobind Singh Indraprastha University (IN), Maharaja Engineering College (IN)
Affordable and clean energy
Openalex Percentile: Top 75%
Integrated Circuits and Semiconductor Failure Analysis
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