Implementation of Eight-Bit Architecture Sobel Algorithm Based on FPGA
Aiming at the problems of inaccurate edge detection and large consumption of hardware resources in the implementation of traditional Sobel edge detection algorithm on FPGA, this paper proposes an improved Sobel algorithm. The algorithm adopts Sobel operator in eight directions and eight-bit architecture to improve the accuracy of edge detection and save the consumption of hardware resources to the greatest extent. Using the new Sobel algorithm, not only the edge detection of the image is completed efficiently, but also reduces the register resource consumption by 13.9% compared with the original eight-direction Sobel algorithm.
Authors
- Panyu Chen (ORCID: https://orcid.org/0000-0003-2174-954X)
- F. Wang
- Huan Zhang (ORCID: https://orcid.org/0000-0002-3052-5794)
- Yaxin Wang (ORCID: https://orcid.org/0009-0003-2540-6437)
- Zhihao Liu (ORCID: https://orcid.org/0009-0003-5878-3941)
Institutions
- Tianjin University of Technology and Education (CN)
Publication Details
- Published
- 2024-12-27
- DOI
- https://doi.org/10.1109/auteee62881.2024.10869767
- Citations
- 7
- Primary Topic
- Wireless Sensor Networks and IoT
- Type
- article
- Field-Weighted Citation Impact
- 2.30