A Comparative Power & Delay Analysis of Full Adder Designs in 90nm CMOS and 32nm & 5nm CNFET Technologies

Adders are the most important building blocks for any digital system. As the transistor technology is scaling down, reliable adder operation with the least power consumption and delay is desirable. CNFET technology has proved to be effective for different digital circuits and systems. To establish the reliability of CNFET-based full adders and predict their performance metrics compared to the CMOS technologies, this paper presents a comparative power and delay analysis of full adder circuits implemented using Carbon Nanotube Field-Effect Transistors (CNFETs) of 32nm and 5nm technology nodes and Complementary Metal-Oxide-Semiconductor (CMOS) at 90nm technology node. The study aims to evaluate the performance of these technologies in terms of power consumption and propagation delay. Simulations were conducted using Cadence Virtuoso simulation tool to ensure accurate and reliable results. Our findings indicate that CNFET-based full adders demonstrate superior performance in terms of speed and power efficiency, particularly at smaller technology nodes. This comparative study provides valuable insights into the full-adder designs using CNFET and CMOS technologies, guiding future research and development in the design of high-performance digital circuits.