Field Effect Transistor Incorporating Negative Capacitance and Nanowire Structures for the Attenuation of Gate Leakage Phenomena
This manuscript discusses a detailed comparative exploration of conventional nanowire field-effect transistors (NW FET) and negative-capacitance field-effect transistors (NC-NW FET) concerning gate leakage phenomena. Various pivotal parameters such as Contour Plots of Electron Velocity and Hole Concentration, Tunnelling Distance, Gate Induced Drain Leakage (GIDL), Band Diagram, Subthreshold Slope (SS), and Transconductance are analyzed at varying channel lengths. This study demonstrates a significant decrease in gate leakages from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-8}$</tex> A to approximately <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-14}$</tex> A, underscoring the superior performance of NC-NW FET.
Authors
- Aapurva Kaul (ORCID: https://orcid.org/0000-0003-3063-4445)
- Deva Nand (ORCID: https://orcid.org/0000-0002-0860-1121)
- Sonam Rewari (ORCID: https://orcid.org/0000-0001-8946-9849)
Institutions
- Delhi Technological University (IN)
Publication Details
- Published
- 2024-11-30
- DOI
- https://doi.org/10.1109/edkcon62339.2024.10870658
- Citations
- 1
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.21