Field Effect Transistor Incorporating Negative Capacitance and Nanowire Structures for the Attenuation of Gate Leakage Phenomena

This manuscript discusses a detailed comparative exploration of conventional nanowire field-effect transistors (NW FET) and negative-capacitance field-effect transistors (NC-NW FET) concerning gate leakage phenomena. Various pivotal parameters such as Contour Plots of Electron Velocity and Hole Concentration, Tunnelling Distance, Gate Induced Drain Leakage (GIDL), Band Diagram, Subthreshold Slope (SS), and Transconductance are analyzed at varying channel lengths. This study demonstrates a significant decrease in gate leakages from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-8}$</tex> A to approximately <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-14}$</tex> A, underscoring the superior performance of NC-NW FET.

Authors

Institutions

Publication Details

Published
2024-11-30
DOI
https://doi.org/10.1109/edkcon62339.2024.10870658
Citations
1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.21
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Field Effect Transistor Incorporating Negative Capacitance and Nanowire Structures for the Attenuation of Gate Leakage Phenomena

Aapurva Kaul, Deva Nand, Sonam Rewari
1 citations
Advancements in Semiconductor Devices and Circuit Design
0.21
article

Field Effect Transistor Incorporating Negative Capacitance and Nanowire Structures for the Attenuation of Gate Leakage Phenomena

Aapurva Kaul, Deva Nand, Sonam Rewari
article en
1 citations

Abstract

This manuscript discusses a detailed comparative exploration of conventional nanowire field-effect transistors (NW FET) and negative-capacitance field-effect transistors (NC-NW FET) concerning gate leakage phenomena. Various pivotal parameters such as Contour Plots of Electron Velocity and Hole Concentration, Tunnelling Distance, Gate Induced Drain Leakage (GIDL), Band Diagram, Subthreshold Slope (SS), and Transconductance are analyzed at varying channel lengths. This study demonstrates a significant decrease in gate leakages from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-8}$</tex> A to approximately <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">${10}^{-14}$</tex> A, underscoring the superior performance of NC-NW FET.

Delhi Technological University (IN)
Affordable and clean energy
Openalex Percentile: Top 44%
Advancements in Semiconductor Devices and Circuit Design
0.21
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Field Effect Transistor Incorporating Negative Capacitance and Nanowire Structures for the Attenuation of Gate Leakage Phenomena — Aapurva Kaul, Deva Nand, et al. · (2024) | TGRS Research Map | TGRS