Double Gate Tunnel FET with Core-Gate Engineering: An Effective Approach to Suppress Ambipolarity

In the present era, the size of MOSFET is scaled down to the nanometer range to achieve lower power consumption and higher switching speed. This continual down-scaling faces difficulties in terms of short channel effects, excessive standby power, and higher subthreshold slope (SS). Tunnel FETs (TFETs) can overcome this constraint by using quantum mechanical band-to-band (BTBT) tunneling of charge carriers in the channel. Because of its low SS, low OFF-state leakage current, and improved ION/IOFF ratio, TFET is an excellent contender for replacing traditional MOSFET. However, low ON current (ION) and ambipolarity are the two main concerns in TFET technology. TFET shows this typical ambipolar behavior, which is undesirable from a circuit design point of view. So, it should be suppressed. This paper considers a new core-gate engineering in a double-gate TFET to suppress the ambipolarity without degrading the ON current. The suggested device provides a higher ION/Iamb switching ratio without compromising the average SS. Further, the effect of varying core gate metal width, dielectric thickness, and work function upon the ambipolarity has been investigated thoroughly.