Analysis of Interface Trap Position Variation in Tunnel FETs

This article reports insights into variation of interface trap position in p-i-n SOI TFET. The impact is measured through statistical variability of the electrical parameters, ON current, OFF current, maximum band-to-band tunneling rate, maximum electron velocity, and threshold voltage. The entire oxide-semiconductor interface is divided into two halves: the high band-to-band tunneling (BTBT) region, and the region outside high BTBT region.