Toward Understanding the Positive Shift of Reverse Turn-on Voltage in the Third Quadrant Operation in Planar SiC Power MOSFETs After Avalanche Breakdown

In this study, we explore the stability of third-quadrant characteristics in planar SiC power MOSFETs under high drain bias above the avalanche breakdown condition. By using experimental measurements and TCAD simulations, we analyze the mechanisms responsible for the positive shift of reverse turn-on voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {rev}, \text {on}}$ </tex-math></inline-formula>) during the third-quadrant operation. When the drain bias is increased from 1500 to 1620 V, obvious negative shifts in threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula>) and positive shifts in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {rev}, \text {on}}$ </tex-math></inline-formula> are observed. The TCAD simulations attribute these shifts to the impact ionization caused by the high electric field inside the p-well regions. Furthermore, with the inclusion of positive fixed charges as the hole traps in the gate oxide near the SiO2/SiC interface, the simulation results show positive shifts of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {rev}, \text {on}}$ </tex-math></inline-formula> consistent with the experimental results. These findings suggest that hole trapping caused by high drain bias above the avalanche breakdown condition can affect the stability of third-quadrant operation in planar SiC power MOSFETs.