Research on Improvement of Scanner System Based on Loongson 2P0500
In view of the high procurement cost in the domestic scanner market caused by high technical thresholds, market monopoly, and expensive prices, a brand-new scanner system is designed to promote the independent innovation and localization of high-speed scanners. Compared with the traditional ARM+FPGA development model, this scheme introduces the Loongson 2p0500 ASIC chip, which is based on the advanced LoongArch architecture, possesses powerful computing capabilities and high customization, and integrates widely used Linux and Free-RTOS systems, providing a stable and efficient operating environment for the scanner, significantly reducing development costs and shortening the product development cycle. Aiming at the problems of slow image transmission speed and image data processing speed in this design, algorithms based on the LoongArch architecture such as JPEG compression and efficient data sorting processing are also introduced, greatly improving the performance of this product. This efficient and economical development model has broad application prospects and can be promoted to other chip developments in the future.
Authors
- Ying Luo (ORCID: https://orcid.org/0000-0002-7006-2122)
- Lü Li (ORCID: https://orcid.org/0009-0005-0580-8767)
- Dejun Chen (ORCID: https://orcid.org/0009-0006-8161-6916)
- Luo Gan
- Ruan Huixiong
- Jia Hongyu
Institutions
- University of Electronic Science and Technology of China (CN)
- Chongqing University of Arts and Sciences (CN)
Publication Details
- Published
- 2024-11-01
- DOI
- https://doi.org/10.1109/cac63892.2024.10865451
- Primary Topic
- Advanced Computational Techniques and Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.00