Research on Improvement of Scanner System Based on Loongson 2P0500

In view of the high procurement cost in the domestic scanner market caused by high technical thresholds, market monopoly, and expensive prices, a brand-new scanner system is designed to promote the independent innovation and localization of high-speed scanners. Compared with the traditional ARM+FPGA development model, this scheme introduces the Loongson 2p0500 ASIC chip, which is based on the advanced LoongArch architecture, possesses powerful computing capabilities and high customization, and integrates widely used Linux and Free-RTOS systems, providing a stable and efficient operating environment for the scanner, significantly reducing development costs and shortening the product development cycle. Aiming at the problems of slow image transmission speed and image data processing speed in this design, algorithms based on the LoongArch architecture such as JPEG compression and efficient data sorting processing are also introduced, greatly improving the performance of this product. This efficient and economical development model has broad application prospects and can be promoted to other chip developments in the future.

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Published
2024-11-01
DOI
https://doi.org/10.1109/cac63892.2024.10865451
Primary Topic
Advanced Computational Techniques and Applications
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article
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article

Research on Improvement of Scanner System Based on Loongson 2P0500

Ying Luo, Lü Li, Dejun Chen, Luo Gan et al.
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Advanced Computational Techniques and Applications
article

Research on Improvement of Scanner System Based on Loongson 2P0500

Ying Luo, Lü Li, Dejun Chen, Luo Gan, Ruan Huixiong, Jia Hongyu
article en

Abstract

In view of the high procurement cost in the domestic scanner market caused by high technical thresholds, market monopoly, and expensive prices, a brand-new scanner system is designed to promote the independent innovation and localization of high-speed scanners. Compared with the traditional ARM+FPGA development model, this scheme introduces the Loongson 2p0500 ASIC chip, which is based on the advanced LoongArch architecture, possesses powerful computing capabilities and high customization, and integrates widely used Linux and Free-RTOS systems, providing a stable and efficient operating environment for the scanner, significantly reducing development costs and shortening the product development cycle. Aiming at the problems of slow image transmission speed and image data processing speed in this design, algorithms based on the LoongArch architecture such as JPEG compression and efficient data sorting processing are also introduced, greatly improving the performance of this product. This efficient and economical development model has broad application prospects and can be promoted to other chip developments in the future.

University of Electronic Science and Technology of China (CN), Chongqing University of Arts and Sciences (CN)
Affordable and clean energy
Openalex Percentile: Top 75%
Advanced Computational Techniques and Applications
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Research on Improvement of Scanner System Based on Loongson 2P0500 — Ying Luo, Lü Li, et al. · (2024) | TGRS Research Map | TGRS