Low-cost embedded facial recognition system based on overlapped local binary pattern

• Design of real-time embedded system for face recognition • a trade-off between accuracy and execution time is considered throughout the development phase, where a set of optimizations are proposed to speed up the face recognition process. • To extract the facial features, Centrally Overlapped Blocks-Local Binary Pattern (COB-LBP) is adopted to preserve the spatial distribution of pixels. • Validation of COB-LBP descriptor performance in a low-cost architecture To establish high-performance facial recognition systems, image descriptor-based methods have been widely adopted in the state-of-the-art. These methods are mainly designed to be run on general-purpose computers. Hence, during the development phase, hardware resources such as available memory and CPU frequency are not considered. Conversely, as low-cost architectures are designed to perform a specific task. Thus, they have limited hardware resources in terms of operating frequency and available memory. Nevertheless, they include essential properties such as autonomy, portability, and low-cost. The facial recognition approaches that will be implemented on hardware architectures will benefit from these properties. In particular, the low-cost will allow the use of facial recognition systems on a large-scale. To overcome this problem, in this work, a trade-off between accuracy and execution time was considered throughout the development phase. To this end, the proposed design methodology is based on the use an image descriptor based on integer computation, as embedded processors are generally inadequate for floating-point calculations. In light of this, the well-known LBP descriptor will be utilized to extract facial features, and specially, we will use the technique of centrally overlapped blocks (CoB) which consists of combining the centers of the distinct blocks in order to preserve the spatial distribution of pixels. Indeed, the LBP descriptor has undergone extensive testing in general-purpose computers, where it has demonstrated its effectiveness. In this study, we aim to evaluate the performance of this descriptor within a low-cost embedded architecture. The proof-of-concept is performed on the low-cost ZC702 SoC FPGA board, which includes a Dual ARM Cortex-A9 with FPGA fabric. The experimental study conducted on the AR, ORL, Yale and Face-95 databases proved the high performance of the proposed system in comparison with the state-of-the-art approaches, where we achieve a recognition rate of respectively 98.88%, 92.50%, 95.55% and 97.40% on the AR, ORL, Yale and Face-95 databases, with a response time of 40 ms.