Power factor correction converters overview with PSIM simulation-based systematic control design for the totem-pole topology

The need for power factor correction (PFC) is inevitable due to the distortion of the supply current that results from the widely used switched mode power supplies (SMPSs). This paper first introduces the effects of SMPSs on the grid and the concept of PFC, followed by a review of the different ways to achieve this correction. Due to its numerous benefits, the totem-pole topology is chosen. A complete design of a totem-pole power factor correction (TPPFC) converter for universal use is demonstrated with the aid of the PSIM software and its SmartCtrl tool for a step-by-step design, achieving a simulated power factor (PF) as high as 0.99984 for normal full loading and a sinusoidal input current with a total harmonic distortion (THD) as low as 1.8038%. This work is the first complete, concise, and easy-to-follow PSIM simulation-based design guide for the TPPFC converter.