A Machine Learning Based Approach for Post Manufacturing Performance Sensing in Analog Circuits

As CMOS technology advances towards miniaturization for enhanced performance, the impact of process uncertainties on analog circuits becomes increasingly pronounced, often resulting in degraded performance. In order to ensure proper functionality, the fabricated analog circuits are subjected to performance check during the production test where these are interfaced with high end Automated Test Equipment (ATE), leading to higher test cost. This work introduces a low-cost Machine Learning (ML) based non-intrusive sensing strategy for performance estimation of process perturbed analog circuits. The sensor outputs, termed as signatures are used for performance prediction using a pre-trained ML model. These sensors are placed close to the Circuit Under Test (CUT), provides an image of process variations, without actually loading it. A systematic approach for identification of sensor signatures is proposed using Recursive Feature Elimination Technique. The proposed performance sensing approach is validated on a current-starved voltage-controlled oscillator (CSVCO), where a neural network-based regression model predicts the key performance metrics in a CSVCO.

Authors

Institutions

Publication Details

Published
2024-10-26
DOI
https://doi.org/10.1109/aisp61711.2024.10870736
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

A Machine Learning Based Approach for Post Manufacturing Performance Sensing in Analog Circuits

Umakanta Nanda, Jayanta Kumar Panigrahi, Debiprasad Priyabrata Acharya
Advancements in Semiconductor Devices and Circuit Design
article

A Machine Learning Based Approach for Post Manufacturing Performance Sensing in Analog Circuits

Umakanta Nanda, Jayanta Kumar Panigrahi, Debiprasad Priyabrata Acharya
article en

Abstract

As CMOS technology advances towards miniaturization for enhanced performance, the impact of process uncertainties on analog circuits becomes increasingly pronounced, often resulting in degraded performance. In order to ensure proper functionality, the fabricated analog circuits are subjected to performance check during the production test where these are interfaced with high end Automated Test Equipment (ATE), leading to higher test cost. This work introduces a low-cost Machine Learning (ML) based non-intrusive sensing strategy for performance estimation of process perturbed analog circuits. The sensor outputs, termed as signatures are used for performance prediction using a pre-trained ML model. These sensors are placed close to the Circuit Under Test (CUT), provides an image of process variations, without actually loading it. A systematic approach for identification of sensor signatures is proposed using Recursive Feature Elimination Technique. The proposed performance sensing approach is validated on a current-starved voltage-controlled oscillator (CSVCO), where a neural network-based regression model predicts the key performance metrics in a CSVCO.

National Institute of Technology Rourkela (IN), SRM University, Andhra Pradesh (IN), VIT-AP University
Affordable and clean energy
Openalex Percentile: Top 75%
Advancements in Semiconductor Devices and Circuit Design
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.