Online Training and Inference System on Edge FPGA Using Delayed Feedback Reservoir
A delayed feedback reservoir (DFR) is a hardware-friendly reservoir computing system. Implementing DFRs in embedded hardware requires efficient online training. However, two main challenges prevent this: 1) hyperparameter selection, which is typically done by offline grid search, and 2) training of the output linear layer, which is memory-intensive. This article introduces a fast and accurate parameter optimization method for the reservoir layer utilizing backpropagation and gradient descent by adopting a modular DFR model. A truncated backpropagation strategy is proposed to reduce memory consumption associated with the expansion of the recursive structure while maintaining accuracy. The computation time is significantly reduced compared to grid search. In addition, an in-place Ridge regression for the output layer via 1-D Cholesky decomposition is presented, reducing memory usage to be 1/4. These methods enable the realization of an online edge training and inference system of DFR on an FPGA, reducing computation time by about 1/13 and power consumption by about 1/27 compared to software implementation on the same board.
Authors
- Takashi Satō (ORCID: https://orcid.org/0000-0002-1577-8259)
- Sosei Ikeda (ORCID: https://orcid.org/0000-0002-5046-7405)
- Hiromitsu Awano (ORCID: https://orcid.org/0000-0002-3674-4584)
Institutions
- Kyoto University (JP)
- Kyoto College of Graduate Studies for Informatics (JP)
Publication Details
- Journal
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 2025-02-12
- DOI
- https://doi.org/10.1109/tcad.2025.3541565
- Primary Topic
- Machine Learning and ELM
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Japan Society for the Promotion of Science