Performance Analysis of FFT(Fast Fourier Transform) with Respect to Different Multipliers

The main goal of this work is to implement the Fast Fourier Transform (FFT) using Booth multipliers and Vedic Multipliers, particularly using the Urdhva Triyambakam Sutra for Multiplication. These unique multiplier architectures enhance the efficiency of FFT computations and also to speed up FFT computations. Through implementation we came to know the relative benefits and drawbacks of FFT with Booth multiplier implementations versus FFT with Vedic multiplier implementations. The combination and contrast of these effective methods gives better information regarding how to best optimize FFT calculations for different applications such as advancements in signal processing algorithms that go beyond conventional multiplier structures. The result discusses the comparison of metrics such as time delay, power consumption, utilization of FFT implementations using both Vedic and Booth Multipliers.