Failure analysis of shorting issues in bipolar junction transistors circuit using electron beam induced current technique

Abstract The electron beam induced current (EBIC) technique is used for failure analysis of integrated circuits (ICs) and provides information beyond what is readily available with standard electrical device testing. EBIC utilizes an electron beam scanned across the device causing the generation of electron–hole pairs, which are separated by drift in the depletion region at a p–n junction layer, inducing a current that can be amplified and measured by probes. This study reports failure analysis conducted on bipolar junction transistor (BJT) circuits fabricated in-house, where electrical testing showed abnormal characteristics. EBIC measurements complemented with focused ion beam-scanning electron microscopy revealed shorting between base resistors and p-type isolation regions. This was attributed to the overetching of isolation oxide, allowing for corrections in the process flow and layout design, and successful refabrication and testing.