Design considerations for ESD protection diodes in bulk FinFET technology

This paper presents design considerations for electrostatic discharge (ESD) protection diodes in 5 nm bulk FinFET technology. Performance metrics of various diode structures, including gated diodes, STI diodes, and square diodes, are evaluated using 3D TCAD device simulations, focusing on thermal breakdown current, on-resistance, and parasitic capacitance. The simulation results are further analyzed to understand the physical mechanisms influencing these performance metrics. In terms of thermal breakdown current, simulation results indicate that the square diode exhibits the best performance, followed by the STI diode, and then the gated diode. Regarding parasitic capacitance, the STI diode demonstrates superior performance, followed by the square diode, and finally the gated diode.