FPGA-Based Accelerator Implementation for Naive String Matching Algorithm

String matching is time-consuming in data search applications, especially with extensive data and many users. This paper demonstrates the performance of hardware acceleration by showcasing the processing speed of the Naive string match algorithm on a hardware platform. We design an algorithm accelerator on the Altera DE2-115 FPGA development board. The results indicate that executing computations on an FPGA yields more than 78 times faster than performing the same functions using the Python language on a CPU.