Reversible Logic Circuit Based Cryptographic Model for Text Message

Cryptography using reversible logic circuits is an emerging research area as it can ensure energy-efficient solutions and lossless information. It is one of the alternatives to traditional cryptography systems where the analysis of the scattered power causes major attacks such as differential power analysis (DP A) and simple power analysis (SPA) which are often executed on the traditional circuits to breach security. This paper explores a reversible logic circuit based symmetric cryptographic model for text messages that supports plain text encryption and decryption processes by leveraging various reversible gates, such as CNOT, Toffoli, and k-CNOT. The proposed work also provides a secured key distribution technique to send the sender's private key to the receiver securely. The experimental results of our proposed symmetric cryptographic model ensure data integrity and a safe key distribution process. Also, the complex design of the reversible circuits increases the secrecy of the text and the key. It is also observed that with the increase in size of the input, there is very minimal change in the time taken for encryption and the time taken for decrypting the ciphertext is almost the same as encrypting the text. The proposed model can be used in cryptographic hardware systems like loT devices, mobile platforms, and other energy-constrained systems because the proposed model theoretically consumes less energy.