A Minimum Value Determination Circuit Using a Neuron CMOS WTA with FGC Circuit

Given an unlabeled time series dataset, it is often required to cluster similar time series data. Dynamic Time Warping (DTW) is one of the useful methods to evaluate the similarity between time series data. However, the algorithm of DTW has a high computational cost and requires substantial computation time. To solve the issue, a DTW distance calculator has been proposed to reduce the computation time of DTW distance calculations. Additionally, a conventional circuit using neuron CMOS Winner-Take-All (vCMOS WTA) circuit has also been proposed for the minimum value determination circuit used in the DTW calculator. However, the proposed minimum value determination circuit was still unstable. In this paper, we propose a new minimum value determination circuit for use in the DTW distance calculator. In addition, this paper describes the circuit design, the circuit operation, and the results of HSPICE simulations.