Phase Opposition-Deposition Carrier Based Pulse Width Modulation Technique to Improve Power quality of Five-level Neutral-Point Diode Clamped Inverter

This work presents pulse opposition deposition modulation technique for 5-level neutral point diode clamped multilevel inverter. The proposed work differentiates conventional and present modulation technique for neutral-point diode clamped 5-level inverter for resistive and inductive load applications. In the present work phase opposition-deposition carrier signals are used for generation of gate pulse to turn on and turn off power semiconductor switches. Through the designing of a specific switching approach using the proposed design technique is successfully generates a 5-level output voltage with neutral-point diode clamped inverter topology. The generated output voltage levels of 5-level neutral-point diode clamped inverter are (0, ±VDC/2, ±VDC/4). To validate the present work simulations were conducted on the MATLAB/Simulink environment. Performance assessments were evaluated on both resistive and inductive loads. The outcomes of the simulations highlight the improves power quality compared to all conventional techniques for 5-level NPCMLIs topology for proposed switching approach.