A Study of Signed-Digit Hybrid Stochastic Number for Arithmetic Computing

In this article, a signed-digit hybrid stochastic number (SD-HSN), which combines the two-line bipolar stochastic number (TLB-SN) and the binary signed-digit (BSD) number, is proposed and discussed. As a bipolar format hybrid stochastic number (SN), SD-HSN extends the concept of conventional TLB-SN to a signed-digit stochastic stream. The positional-weight-based TLB-SNs are still a stochastic stream with BSD, which is computed according to the arithmetic of its expectation with the redundant number method. The multiplication by SD-HSN shows a high-computational performance thanks to the redundant SD-HSN circuit. The efficient multiply-accumulate (MAC) is implemented by SD-HSN designs with low area and low-power consumption. The fault tolerance mechanism of SD-HSN is demonstrated by a JPEG image compression algorithm and a neural network. Besides, SD-HSN shows its advantage in hardware cost and power consumption over conventional BSD number multiplication and its high accuracy, high efficiency, and low latency compared to the classic stochastic computing (SC) methods. The SD-HSN circuits proposed, which include a generator, adder, and multiplier, are designed and implemented based on a standard 40-nm CMOS process.