Development of an RTL Model of a Pseudo-Random Number Generator Based on Nonlinear Feedback Shift Registers in a Gollmann Cascade

Random numbers are extensively used in machine learning, information security, mathematical modelling, and IoT devices. Pseudo-random number generators (PRNGs) are devices that generate sequences of numbers whose properties are close to random over a certain period. Requirements for PRNGs are increasing with the development of their applications, which necessitates the development of new PRNGs. At present among the prospective PRNGs, the ones based on nonlinear feedback shift registers (NLFSRs) with increased unpredictability can be distinguished. In this study, a developed RTL PRNG model based on NLFSR for 32-bit systems on a chip in HDL Verilog is proposed. The developed RTL PRNG model based on NLFSR consists of four 16-bit NLFSRs in a Gollmann cascade, a data acquisition module from the NLFSR cascade, a group of control registers, and an advanced microcontroller bus architecture (AMBA) advanced peripheral bus (APB) connection. The statistical properties of this PRNG are tested with the NIST STS 800-22 test suite and meet the test criteria. A comparison of the number of subsequences, failing the most significant tests of the NIST STS 800-22 suite, of PRNGs from the NIST package and of the Mersenne Twister from the Matlab environment with the developed PRNG demonstrates that the latter has the least number of failed subsequences. According to the results of the Monte Carlo calculation of π, the developed PRNG has a smaller standard deviation and median shift error than the Mersenne Twister PRNG used in the Matlab environment.