Research and Development of a Deep Anisotropic Silicon Plasma Etching Process with Reduced Sidewall Roughness of the Structures

In the production of micro- and nanoelectronic devices for silicon deep reactive ion etching, the Bosch process is widely used in the formation of trench structures. However, scallop irregularities formed during etching on the sidewall of the formed structure can significantly impair the characteristics of the final product being created, for example, nanophotonic structures. In this study, a simple and effective method for reducing the scallops’ height on the structures’ side surfaces is proposed. To achieve the result, the impact of the Bosch process parameters on the profile and micromorphology of the structures’ walls is studied. In particular, the impact of the ratio of the etching and passivation times, bias RF power on the electrode-substrate, and pressure and speed of the gas flows used on the linear dimensions of the scallops are studied. The impact of the operational parameters on the geometry of the scallops on the sidewalls of the structures is estimated from the measured values of the scallops’ depth and length for each set of operational parameters. The research carried makes it possible to develop a process to form structures with scallops’ depth reduced by 65% and scallops’ length reduced by 43% on their side surfaces. The side wall smoothing method described in this study is suitable for application in silicon micromachining for a wide range of photonics, as well as micro- and nanoelectronics products.

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Publication Details

Journal
Russian Microelectronics
Published
2024-12-01
DOI
https://doi.org/10.1134/s1063739724700872
Citations
1
Primary Topic
Advanced Surface Polishing Techniques
Type
article
Field-Weighted Citation Impact
0.18
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article

Research and Development of a Deep Anisotropic Silicon Plasma Etching Process with Reduced Sidewall Roughness of the Structures

I. F. Potapenko, А. А. Golishnikov, Nikita M. Somov, V. V. Paramonov et al.
1 citations
Russian Microelectronics
Advanced Surface Polishing Techniques
0.18
article

Research and Development of a Deep Anisotropic Silicon Plasma Etching Process with Reduced Sidewall Roughness of the Structures

I. F. Potapenko, А. А. Golishnikov, Nikita M. Somov, V. V. Paramonov, N. A. Dyuzhev, Yu. A. Chaplygin, M. G. Putrya
article en
1 citations

Abstract

In the production of micro- and nanoelectronic devices for silicon deep reactive ion etching, the Bosch process is widely used in the formation of trench structures. However, scallop irregularities formed during etching on the sidewall of the formed structure can significantly impair the characteristics of the final product being created, for example, nanophotonic structures. In this study, a simple and effective method for reducing the scallops’ height on the structures’ side surfaces is proposed. To achieve the result, the impact of the Bosch process parameters on the profile and micromorphology of the structures’ walls is studied. In particular, the impact of the ratio of the etching and passivation times, bias RF power on the electrode-substrate, and pressure and speed of the gas flows used on the linear dimensions of the scallops are studied. The impact of the operational parameters on the geometry of the scallops on the sidewalls of the structures is estimated from the measured values of the scallops’ depth and length for each set of operational parameters. The research carried makes it possible to develop a process to form structures with scallops’ depth reduced by 65% and scallops’ length reduced by 43% on their side surfaces. The side wall smoothing method described in this study is suitable for application in silicon micromachining for a wide range of photonics, as well as micro- and nanoelectronics products.

Russian MicroelectronicsVol. 53(7)
National Research University of Electronic Technology (RU)
Openalex Percentile: Top 49%
Advanced Surface Polishing Techniques
0.18
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