A Novel Metal-Bridging Free Lift-Off Process for Fabricating High-Performance Sub-100-nm Gate Length MoS₂ Transistors

A novel approach for fabricating molybdenum disulfide (MoS2) transistors with sub-100-nm gate length is reported. Unlike the traditional lift-off process, the photoresist (PR) is not in contact with the MoS2 channel, while the metal deposited in the source/drain (S/D) areas is not bridged with that on PR through the PR sidewalls. A sacrificial oxide layer between the channel and the PR enables the two distinct features, which are done after generating the PR pattern that defines the S/D regions, selectively removing the sacrificial oxide to suspend the PR between the source and drain regions. When metal is subsequently deposited, the metal on the PR will naturally disconnect from that in the S/D regions due to the air gap between the PR and the channel. The new metal-bridging-free process frees the fabricated devices from many issues encountered in the traditional lift-off process. Besides, we combined the I-line photolithography and a novel PR trimming technique to demonstrate the feasibility of this approach in fabricating nanometer-scaled devices with high throughput. The fabricated MoS2 transistors with Au contacts exhibit S/D series resistance of 2.4 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula>-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> m.