STATIC TIMING ANALYSIS (STA): FUNDAMENTALS AND IMPLEMENTATION IN NANOMETER DIGITAL DESIGN

This comprehensive article explores Static Timing Analysis (STA) as a fundamental methodology in modern digital design verification, focusing on its evolution, implementation, and future directions in nanometer-scale semiconductor designs.The article delves into the comparative advantages of STA over traditional simulation methods, analyzing its impact on design verification efficiency and reliability.The

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Journal
INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING & TECHNOLOGY
Published
2025-02-07
DOI
https://doi.org/10.34218/ijcet_16_01_148
Primary Topic
Low-power high-performance VLSI design
Type
article
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article

STATIC TIMING ANALYSIS (STA): FUNDAMENTALS AND IMPLEMENTATION IN NANOMETER DIGITAL DESIGN

Bharati Guvvala
INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING & TECHNOLOGY
Low-power high-performance VLSI design
article

STATIC TIMING ANALYSIS (STA): FUNDAMENTALS AND IMPLEMENTATION IN NANOMETER DIGITAL DESIGN

Bharati Guvvala
article en

Abstract

This comprehensive article explores Static Timing Analysis (STA) as a fundamental methodology in modern digital design verification, focusing on its evolution, implementation, and future directions in nanometer-scale semiconductor designs.The article delves into the comparative advantages of STA over traditional simulation methods, analyzing its impact on design verification efficiency and reliability.The

INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING & TECHNOLOGYVol. 16(1)
SRM University (IN)
Openalex Percentile: Top 98%
Low-power high-performance VLSI design
DOIOpen Access PDFOpenAlex
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STATIC TIMING ANALYSIS (STA): FUNDAMENTALS AND IMPLEMENTATION IN NANOMETER DIGITAL DESIGN — Bharati Guvvala · INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING & TECHNOLOGY (2025) | TGRS Research Map | TGRS